1. Field of the Invention
The present invention relates to a carry-ripple adder and to an adding apparatus for the summation of a plurality of binary coded numbers.
2. Description of the Prior Art
Adders are known in the art and generally serve for adding equivalent bits, the corresponding summation value being output as a summation or parity bit and further necessary carry bits being generated. Carry-save (CS) adders have, for example, a number of inputs having equal entitlement for receiving the number of equivalent bits to be summed and, during operation, sum the bits present at the inputs with equal entitlement. That is to say that generally the same number of controllable paths of transistors lies between a carry or summation output of a CS adder and an internal supply voltage terminal.
In carry-ripple (CR) adders, the inputs do not have equal entitlement, but rather are organized into summing inputs and carry inputs. In this case, the bits present at the summing inputs are summed taking account of the carry bits present at the carry inputs and a corresponding summation bit is output. In this case, the carry bits present at the carry inputs are obtained during the summation of equivalent bits having a lower significance. Furthermore, a carry-ripple adder supplies at carry outputs carry bits having a higher significance than the bits present at the summing and carry inputs.
In this case, the critical path between a carry input and a carry output of a CR adder is intended to be embodied with maximum speed optimization, that is to say to have the fewest possible logic gates. Consequently, CR adders are suitable for use as output stages of adding devices for adding binary coded numbers since the calculation operation, preceding from a least significant digit of the summation result, for determining the summation bit having the next higher significance, provides particularly rapidly the carry bits required for the calculation thereof.
German patent 101 17 041 C1 describes a carry-ripple adder having five inputs for bits having an identical significance w that are to be summed and two inputs for receiving carry bits having the same significance w. A summation bit having the significance w can be tapped off at an output and two carry bits having different significances 2w and 2w can be tapped off at two carry outputs.
German patent 103 05 849 B3 likewise describes a carry-ripple adder having three summing inputs for input bits having an identical significance w that are to be summed and two carry inputs for carry bits having the same significance w. A summation bit having the significance w can be tapped off at an output and carry bits having the significance 2w can be tapped off at two carry outputs.
The carry-ripper adder according to published German patent application 101 39 099 A1provides three or four inputs for input bits having the identical significance w that are to be summed and two inputs for receiving carry bits having the same significance w. A summation bit can be tapped off at an output and two outputs are provided for two carry bits having the significances 2w and 4w.